Samsung develops a 50-nanometer, 1-gigabit DDR2 DRAM chip

Samsung develops a 50-nanometer, 1-gigabit DDR2 DRAM chip

South Korean tech giant Samsung has developed a 50-nanometer, 1-gigabit DDR2 DRAM chip. This chip is based on three-dimensional transistor design and multilayered dielectric technology.

The company added that they are using a selective epitaxial growth transistor (SEG Tr), which hastens the flow of electrons by creating a wider channel.

This results in chips that consume less electricity and gives out better performance. However, not many details have been revealed.

Samsung has also applied its proprietary RCAT (Recess Channel Array Transistor) 3D transistor technology to the chip. This itself doubles the refresh rate of DRAM. They plan to begin mass production of these chips in next 2 years.